CVE-2026-53354: Software Security Vulnerability Vulnerability

HIGH
Advisory Identifier: GHSA-j98r-r99h-p736
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CVSS 8.8
CWE-362
Published
Advisory Summary

CVE-2026-53354 is a HIGH (CVSS 8.8) security vulnerability vulnerability (CWE-362: Concurrent Execution using Shared Resource with Improper Synchronization ('Race Condition')) affecting Software libraries in the Maven ecosystem. The weakness occurs when the product contains a concurrent code sequence that requires temporary, exclusive access to a shared resource, but a timing window exists in which the shared resource can be modified by another code sequence operating concurrently.. Remediation is available in the latest vendor maintenance releases.

CVE-2026-53354 at a Glance

CVE Identifier CVE-2026-53354
GHSA Identifier GHSA-j98r-r99h-p736
Severity HIGH
CVSS v3.1 Base Score 8.8
CWE Classification CWE-362: Concurrent Execution using Shared Resource with Improper Synchronization ('Race Condition')
Affected Product Software
Package Ecosystem Maven
Published Date
Last Updated

Security Impact

CVSS: 8.8

The security impact metrics below are parsed directly from the CVSS v3.1 vector string (CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:H/A:H).

Attack Vector Local (AV:L)
Attack Complexity Low (AC:L)
Privileges Required Low (PR:L)
User Interaction None (UI:N)
Scope Changed (S:C)
Confidentiality High (C:H)
Integrity High (I:H)
Availability High (A:H)

How to Fix CVE-2026-53354

To remediate this vulnerability, upgrade all affected Software dependencies to a patched release. Both direct and transitive dependencies should be checked, as frameworks or security libraries may pull in vulnerable versions transitively.

Verify Direct and Transitive Dependencies

Run the following command in your project directory to verify that all resolved dependencies use the patched release: 

mvn dependency:tree

How to Check if You Are Affected

To determine whether your Java application is affected by CVE-2026-53354, inspect your build dependencies using the Maven Dependency Plugin:

mvn dependency:tree

Analyze the terminal output to locate any version of Software in your dependency tree. If any resolved version matches the vulnerable ranges listed in the table below (for example, versions earlier than the patched release), your application is affected.

Note: The mvn dependency:tree command inspects the resolved dependency graph declared in your project's POM files; it does not perform automated security scanning or inspect runtime dynamic classpaths. Always verify runtime container classpaths and shaded JARs.

Technical Details

Vulnerability Mechanism & Technical Analysis

This vulnerability is classified under CWE-362: Concurrent Execution using Shared Resource with Improper Synchronization ('Race Condition'), where the product contains a concurrent code sequence that requires temporary, exclusive access to a shared resource, but a timing window exists in which the shared resource can be modified by another code sequence operating concurrently. In Software, software state validation or input boundaries are circumvented during processing. Review the official source advisory statement below for specific affected components, classes, and reproduction details.

Source Advisory Statement

In the Linux kernel, the following vulnerability has been resolved: arm64: errata: Mitigate TLBI errata on various Arm CPUs A number of CPUs developed by Arm suffer from errata whereby a broadcast TLBI;DSB sequence may complete before the global observation of writes which are translated by an affected TLB entry. These errata ONLY affect the completion of memory accesses which have been translated by an invalidated TLB entry, and these errata DO NOT affect the actual invalidation of TLB entries. TLB entries are removed correctly. This issue has been assigned CVE ID CVE-2025-10263. To mitigate this issue, Arm recommends that software follows any affected TLBI;DSB sequence with an additional TLBI;DSB, which will ensure that all memory write effects affected by the first TLBI have been globally observed. The additional TLBI can use any operation that is broadcast to affected CPUs, and the additional DSB can use any option that is sufficient to complete the additional TLBI. The ARM64_WORKAROUND_REPEAT_TLBI workaround is sufficient to mitigate the issue. Enable this workaround for affected CPUs, and update the silicon errata documentation accordingly. Note that due to the manner in which Arm develops IP and tracks errata, some CPUs share a common erratum number.

References

NVD — CVE-2026-53354 NVD
https://nvd.nist.gov/vuln/detail/CVE-2026-53354
git.kernel.org/stable/c/1268c64e2b... WEB
https://git.kernel.org/stable/c/1268c64e2bcb6e968152990e87bd10c440fcc9c0
git.kernel.org/stable/c/1b47b1e1d8... WEB
https://git.kernel.org/stable/c/1b47b1e1d8675fdf5f6e11e7fa19c704d8c6f5cd
git.kernel.org/stable/c/4e7c80742e... WEB
https://git.kernel.org/stable/c/4e7c80742e6dada9f8b9ad63f3a49c03af07ecb8
git.kernel.org/stable/c/7c3ad93650... WEB
https://git.kernel.org/stable/c/7c3ad9365079e716b57d2363d3081ee7680cc18e
git.kernel.org/stable/c/8364384ae8... WEB
https://git.kernel.org/stable/c/8364384ae82fbffdf8968abaac3455ed854da18d
git.kernel.org/stable/c/9250582032... WEB
https://git.kernel.org/stable/c/925058203229403008d77a52b1e63e2ae5f4a3cf
git.kernel.org/stable/c/cfd391e741... WEB
https://git.kernel.org/stable/c/cfd391e74134db664feb499d43af286380b10ba8
git.kernel.org/stable/c/d4fd428220... WEB
https://git.kernel.org/stable/c/d4fd4282204044fdedd1e42abbe70a9206f74ec0
git.kernel.org/stable/c/e717a4d087... WEB
https://git.kernel.org/stable/c/e717a4d08779f1a28d6e0275e75040b12c33c753

Frequently Asked Questions

What is CVE-2026-53354?
CVE-2026-53354 is a security vulnerability in Software classified as a security vulnerability vulnerability under CWE-362: Concurrent Execution using Shared Resource with Improper Synchronization ('Race Condition').
Which Software versions are affected?
Affected versions include releases prior to current release patches.
What version fixes CVE-2026-53354?
Upgrading to current release patches (or the latest patched release for your respective branch) resolves the vulnerability.
What is the CVSS score of CVE-2026-53354?
CVE-2026-53354 has a CVSS v3.1 base score of 8.8 (HIGH) with vector string CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:H/A:H.
What CWE is associated with CVE-2026-53354?
CVE-2026-53354 is classified under CWE-362: Concurrent Execution using Shared Resource with Improper Synchronization ('Race Condition') (The product contains a concurrent code sequence that requires temporary, exclusive access to a shared resource, but a timing window exists in which the shared resource can be modified by another code sequence operating concurrently.).
How can I check Maven dependencies for CVE-2026-53354?
Run the dependency tree command: 'mvn dependency:tree'. This command lists direct and transitive dependencies in your build configuration so you can verify if a vulnerable version is resolved.
Machine-readable OSV JSON OSV v1.5 Schema
Normalized schema output
View Raw JSON 
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  "id" : "GHSA-j98r-r99h-p736",
  "modified" : "2026-07-18T09:32:16Z",
  "published" : "2026-07-01T15:35:19Z",
  "aliases" : [ "CVE-2026-53354" ],
  "details" : "In the Linux kernel, the following vulnerability has been resolved:\n\narm64: errata: Mitigate TLBI errata on various Arm CPUs\n\nA number of CPUs developed by Arm suffer from errata whereby a broadcast\nTLBI;DSB sequence may complete before the global observation of writes\nwhich are translated by an affected TLB entry.\n\nThese errata ONLY affect the completion of memory accesses which have\nbeen translated by an invalidated TLB entry, and these errata DO NOT\naffect the actual invalidation of TLB entries. TLB entries are removed\ncorrectly.\n\nThis issue has been assigned CVE ID CVE-2025-10263.\n\nTo mitigate this issue, Arm recommends that software follows any\naffected TLBI;DSB sequence with an additional TLBI;DSB, which will\nensure that all memory write effects affected by the first TLBI have\nbeen globally observed. The additional TLBI can use any operation that\nis broadcast to affected CPUs, and the additional DSB can use any option\nthat is sufficient to complete the additional TLBI.\n\nThe ARM64_WORKAROUND_REPEAT_TLBI workaround is sufficient to mitigate\nthe issue. Enable this workaround for affected CPUs, and update the\nsilicon errata documentation accordingly.\n\nNote that due to the manner in which Arm develops IP and tracks errata,\nsome CPUs share a common erratum number.",
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    "url" : "https://git.kernel.org/stable/c/e717a4d08779f1a28d6e0275e75040b12c33c753"
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