Common Weakness Enumeration
CWE-1421 Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution
Description
A processor event may allow transient operations to access architecturally restricted data (for example, in another address space) in a shared microarchitectural structure (for example, a CPU cache), potentially exposing the data over a covert channel.
Associated Reviewed Advisories
Vulnerabilities classified under CWE-1421 ordered by modification date.
No Reviewed Advisories Found
There are no reviewed OSV records mapped to this CWE at this time.